UCC I/O-Interface ("IOI") Specification

1. IOI device

The I/O Interface (IOI) is an FPGA-based multi-purpose control and sensing I/O interface.
In addition to 24 individually configurable general purpose I/O lines (GPIOs) it provides one (with handshake) or two (without handshake) multi-purpose RS-232 and two multi-purpose RS-485 ports, operated by individual multi-mode UART modules.
GPIO lines can either use the internal +5V or an externally supplied pullup voltage for all GPIO lines; Each GPIO may also use its own pullup or signal voltage up to +24V.
The 24 GPIOs are grouped into 6 ports with 4 lines each in a pluggable terminal block, with a GND and Vdc terminal block on either side.
All ports are under software control by the UCC host controller and configuration is done in software.

2. IOI power supply

CAUTION: Common GND is used for UCC, SCLAN and all I/O!
IOI Power supply options:
+5V logic supply:
  » Host Vcc jumper set (default): from UCC host
  » Host Vcc jumper open: external through separate logic Vcc input
I/O Vdc supply:
  » I/O Vdc jumper set (default): use +5V logic Vcc
  » I/O Vdc jumper open: external through separate I/O Vdc input

3. I/O

3.1. general-purpose I/O (GPIO)

I/O * 24:
  » 6 ports A..F with 4 signals each (A1..4, B1..4, C1..4, D1..4, E1..4, F1..4)
  » all 24 ports individually configurable as:
  » open drain pull-down switch output (max. 1.7A)
  » open drain pull-down PWM output (max. 1.7A)
  » pull-down switching input (4.7k Ohm pull-up to Vdc)
  » LED status indicator for each I/O:
  » red: output active
  » green: input active
  » all I/O common GND, common I/O Vdc
NOTE: The Vdc pullup is coupled to each I/O line with a diode, so external signals or pullups for each line can go to max. 24V regardless of Vdc. For external signals above that, a voltage divider or reduction diode must be used.
Potential separation must be provided externally (via optical couplers, for instance).

3.1.1. PWM

  » up to 24 individual channels
  » configurable resolution: 2..65536 levels (example: precisely 1000 levels)
  » configurable period frequency
  » up to 762Hz at full resolution
  » up to 25MHz at lower resolutions

3.2. RS-232

1: -
2: -
3: RXD1
4: RTS1 / TXD2
5: TXD1
6: CTS1 / RXD2
7: -
8: -
9: GND
10: GND (shield)
Usage:
  » RS-232 * 1 with RTS/CTS handshake (crimped cable to DB-9 male D-Sub connector)
  » RS-232 * 2 without handshake (special Y cable)

3.2.1. multi-mode UART

  » speed: 95..6250000 baud
  » noise rejection
  » universal pattern generation / detection
  » autonomous loop mode (DMX etc.)
  » auto response
  » bytestream filter
  » separate speeds and operation modes possible for input and output

3.3. RS-485

RS-485 (1, 2) (5V differential):
1: GND
2: +5V
3: A
4: B
A jumper for each port terminates A, B with 120 Ohm.
Each RS-485 port has a multi-mode UART (see 2.2.1).
Usage:
  » serial port / bus:
  » full multi-mode UART capabilities
  » bus mode with collision detection and arbitration support
  » special frames
DMX:
hardware setup:
  » No termination (jumper open)
  » RS-485.1 -> DMX.1
  » RS-485.3 -> DMX.3
  » RS-485.4 -> DMX.2
protocol:
  » up to 2000 channels (if supported by devices)
  » jitter-free (autonomous loop mode)
  » full speed (zero unwanted latencies)
  » DMX standard compliant
  » adaptations to device limitations remain possible